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Re: [colorforth] ForthBox and FPGA (was: Ideas)

On Monday 01 March 2004 05:17 pm, Mark Slicker wrote:
> How feasible is it to design your own tools? Chuck has of course done
> this OKAD.

Utterly impossible for my level of finances.  Xilinx and their 
competitors do not disclose their programming information freely.  They 
go so far as to disclose the number of bits used per row, and the 
framing structure, but the actual *contents* of the data frames are 
undisclosed.

Much of it has to do with the fact that every chip vendor has a different 
format for those frames.  Moreover, even within the same vendor's 
family, different chips have different layouts.

In short, it's a complete compatibility mess.  For Forth, it's not really 
an issue; but it is easy to see why they wouldn't want to release their 
chip's details even if they were feeling benevolent about it.

> I've used the Xilinx tools on Windows, but was not too impressed at
> the time. Plus, if I remember right some of job of software is compile
> abstract specifications in VHDL. Could the FPGA be succefully
> addressed at a lower level?

Yes, it can.  But it's inconvenient to do so, because you need to set up 
gate-level descriptions of hardware in VHDL/Verilog.  It's verbose, it's 
error-prone, but if you can pull it off, it is well worth it.

I would *love* to be able to exploit an FPGA chip at a low level via 
Forth.  If someone can reveal the internal chip programming format, then 
I'd do it in a heart beat.  Simulation would even be trivial.

> If this completely off-base, please ingore it, I don't spend too much
> time with hardware design.

No, I'm glad you raised the question.  It's a good one, and I do wish 
some documentation were made available, even for smaller FPGAs.

--
Samuel A. Falvo II


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