Re: [colorforth] Musings on SEAForth

[Gwenhwyfaer <gwenhwyfaer@xxxxxxxxx>]

On 21/01/2008, Jeff Fox <fox@xxxxxxxxxxxxxxxxxxx> wrote:
> In 2000 he decided to make a
> chip that could have a reverse pinout of an 18-bit fast cache
> sram so that it could be mounted back to back with an 18-bit
> fast ram.

Which makes sense for that, sure, but why is SEAforth based on the x18 core
rather than the P21 core?

> I think part of it is that Chuck rebels against the 8-bitness
> you see in C.  He says C has to carry that burden but he
> doesn't.

Funnily enough, one of the key reasons for C's existence in the first place
was the fact that the PDP-11 was byte-addressed. Otherwise, I'm sure B would
have sufficed... for example, if Bell Labs had said to Ken Thompson "no, you
can't have a PDP-11, but we'll buy you a DG Nova"...

> Many computers have no internal memory at all.

Actually, these days pretty much all computers come with some internal
memory. It's just not addressable as such, except in MCUs (which don't tend
to have external memory).

Of course, even on modern x86 CPUs, 16-bit Forth has an advantage - how many
other environments can run entirely within L1 cache...?

Regards
Gwenhwyfaer

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