Misc instruction sets
- To: misc (misc)
- Subject: Misc instruction sets
- From: Wayne Morellini <waynem1@xxxxxxxxxxxxxxxxx>
- Date: Tue, 12 Mar 1996 12:29:37 +1000 (EST)
- Cc: waynem1@xxxxxxxxxxxxxxxxx (Wayne Morellini)
Hi
Sad to see that there is not much traffic on the list, is there other
alternatives for news/discussion on Misc processors?
Anyway as I am still working on my own personal Misc component stratergy
with regards to an OS, I am seeking some free advice on structure of Misc
instruction sets.
I have in the past worked out an suitable instruction set and am about to
finish it off, of course knowing the efficencies of stack based
architechers I would hope to make it stack based, but I also would like to
know more about the deficencies of this stratergy? I would also like to
hear about things to do with what are the basic needed instructions, what
formats produce the best speed and memory efficencies (for example maths
instructions), what leads to the best speed and memory efficencies of the
overall code? For instance Intel, I beleive, spend millions of dollers on
code simulation to improve the performance of their instruction set, a
little bit of logical thought and discussion could do the same for Misc
designs. This would probably be of benefit for all who attend the list
and the future design of misc engines.
Well thats it, and by the way how is the New Boards for the Mup21 comming
along, and what is happening with the other Chips (F21 say) at the moment?
Wayne Morellini
waynem1@cq-pan.cqu.edu.au
Microsun
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