Re: academic freedom (The Mentifex Manifesto)

[Francois-Rene Rideau <rideau@xxxxxx>]

>>: Robert Jay Brown wrote
>: Jeff Fox wrote

>> Go back to Atlantis where you cam from! [...]  PS Atlantis is most likely
>>know to Biblical scholars as Sodom, which was flooded by the Dead Sea
>>after the destruction chronicled in Genesis.  Your New Age tripe is
>>not welcome on this list!
>
> I do not consider the MISC mail list a religious forum and would 
> prefer to not see it head in that direction.
>
Sure. I don't think the Mentifex post was appropriate either:
no information, only propaganda. This Mentifex stuff was more like a spam.


> F21 was not designed to crunch large floating point arrays, so many
> people have missed the value of its parallelism.
Well, surely I can imagine
a net of thousands of P21
doing much better at number crunching than an equivalently priced
supercomputer cluster of a few tens RISC/VLIW chips.

> I have been told
> that the only value of parallelism is in the cost [which?] is no factor [in]
> high end grand challange machines.
I'm not so sure. Here is what you could reply to them:
even if it were only cost,
it means more people can experiment,
which means advances come faster, etc;
and when cost is reduced in orders of magnitude,
this also means orders of magnitude more parallelism available
to people that pay as much.

> If people have alternatives that they feel map well to MISC then
> I would be interested in the details.
>
I think that *any* software maps well to MISC,
given good compiler support.
To me, MISC would be a good argument
to have people do cheaply by making software better
what they currently do expensively by making hardware more bloated:
large money savings!
This could be the end of C/C++ and such languages.

> I enjoy a good metaphysical discussion of the implications of
> porting a program like mentifex to F21, but I think a more detailed
> and technical description of the program is needed first.
>
If you're interested in grand vision programs for MISC chips,
well, MISC chips are the first architecture I'd like to port my OS to
(see http://www.eleves.ens.fr:8080/home/rideau/Tunes/)
after it's prototyped.
By that time, I hope the P32 will be out,
that will make byte-size-munging stuff easier to handle portably.

   Also, I'm looking for a simple semi-portable FORTH-like virtual machine
that I could use as an interoperable implemention of my OS.
I think the F21 instruction set is too basic for that.
What do you suggest?

> The MISC mail list has been open to many types of discussions: 
> hardware theory, documentation, kit details, future hardware
> design tradeoffs, software tricks, etc.  I think there is room
> for people to promote discussions of the kind of software they
> would like to see ported to MISC chips.
>
I'd love to see clusters of standalone P32 chips w/ on-chip RAM
be used for super-computations. Those chips would each be a
self-sufficient computation provider with minimal integrated "firmware"
to boot from the network.
   Motherboard designers would just adjust the number of chips
and geometry of the network to suit their needs
(if each P32 has connectivity to three I/O channels or two buses,
then just any geometry can be achieved by combining chips).
Special nodes on the network/motherboard would do I/O,
and among them, one would be connected to a ROM/FlashROM,
so it would transmit actual boot code to other units on the network.
   I can even imagine some kind of lego system where people could build
their own computer by assembling standalone P32-driven units,
from handheld calculators to supercomputers.
   The network could self-configure, and software would adapt to it.


> MISC is exploring new concepts in both hardware and software.  I
> am interested in new ideas.  I have little interest in hearing
> "MISC is of no use to me because I cannot do everything exactly
> the same way I do it now."
>
Well, I can very well say that MISC is currently of no direct use to me,
because it doesn't allow me to do things any better than I can now.
   However, I do think that MISC has
a much greater potential than other competing technologies,
and hence think that resources should be invested in MISC
rather than in those bloated traditional designs.

Actually, my idea is that high-level software design
could be decoupled from low-level details,
so that their would be no other criterion for buying hardware
than the hardware being competitive as for performance/price
(performance being considered for the particular problem).
   In such case, I'm confident that parallel MISC systems would
quickly overthrow current bloated sequential architectures.
   Decoupling means that implementation-dependent refinements
could be orthogonally added to the semantical definition for objects.
For instance, you would define a database
by its expected behavior with respect to requests;
then various different practical implementations could be given separately,
whether hand-written or compiler-generated (with ro w/o human hints),
in a way that ensures compliance to the defined behavior
(with a formal verification system).
   People would then choose the appropriate hardware/code-generator
combination to maximize performance of their software
within affordable price range,
and of course MISC would win at that game...

> I see no problem with information about mentifex being posted here
> but I would like to see more details and less hype.
>
I think that extensive general Mentifex discussion in the MISC list
would be inappropriate:
they ought to have a mailing-list of their own for that.
Of course, MISC implementation of Mentifex, as you suggest,
would not be inappropriate. But they don't look like they'll do it.

P.S.: a few questions about MISC chips:
1) *what?* if I don't wait enough time for the carry to propagate before +?
 What can I predict about the result?
 Can it be used when I know the carry won't propagate,
 or specifically want it not to propagate to much?
2) how does the F21 translate stuff from 8-bit boot ROM
 into 20-bit instructions?
3) how do you use the +* operator?
 it looks like to me it is complicated to use,
 and eats up the low bit as a flag during multiplies;
 what is an actual multiply routine like?
 Say sources for UM* ?
4) when is the P32 scheduled for?
 Will it have a 32-bit or 33-bit ALU?
5) Is there any project for MISC
 technology to be used in PC-class and/or laptop/handheld computers?
 I'd love a cheap voice-driven portable computer system,
 with optional LCD interface and desktop computer connectivity!

== Fare' -- rideau@ens.fr -- Franc,ois-Rene' Rideau -- DDa(.ng-Vu~ Ba^n ==
Join the TUNES project for a computing system based on computing freedom !
                TUNES is a Useful, Not Expedient System
URL: "http://www.eleves.ens.fr:8080/home/rideau/Tunes/";