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Re: on chip RAM


On Fri, 21 Mar 1997, Wayne Steven MORELLINI - Wayne wrote:

> Yes the Memory on chip would only have to be 4* slower than the 
> processor in the Mup21 and 8 times times slower in the P32 to 
> archieve the full Mips of the processor.  (4 or 8 instructions per 
> memory location).  So there is a bit of room here.

4x5=20 6x5=30.

> Does Chuck keep a record of his work and techniques in case anything 
> goes wrong Jeff?

You mean, does iTV hold insurance policies for a couple of $M angainst
something going wrong with Chuck?  That would be investors money well
spent :-)

--
Penio Penev <Penev@pisa.Rockefeller.edu> 1-212-327-7423