interview with Chuck

[jfox@xxxxxxxx (Jeff Fox)]

Dear MISC Readers:

>From: "Michael A. Losh" <mlosh@tir.com>
>Subject: Questions for a Chuck Moore interview

I have planned to ask Chuck a half dozen questions about Forth,
his ideas about hardware/software etc and give him about five
minutes to talk about each one.

When I asked for questions I thought that perhaps I might get 
a suggestion for something that I might have missed.  I figured
if a half dozen people offered a suggestion I might replace
one or two of the questions I had planned with one's that
people were interested in.

There are over two hundred people in the MISC list, and I was not
looking for a list of thirty or fourty questions from each
person and submit to Chuck hundreds of pages and thousands of
questions.

I know Chuck well enough to know that some of your questions would
get an hour long response from him.  I had not planned asking the
kind of questions that require detailed technical explanations.
I am planning this to be an overview of the direction Forth has
taken for Chuck over the last ten years since little has been
published about this.

If I may let me address your first couple of questions.

>What are the challenges in putting DRAM or Static RAM on chip for fully
>integrated MISC chips?  

I suspect the challange here is the same as it has been for everything
else.  It requires experimentation and iterative design and refinement.
There is not place to find answers to the many questions that need to
answered short of experimentation.  Chuck might find someone who can
answer more of his questions on memories than he could on processors
because they have fewer circuits replicated more times.

Chuck has already said in published interviews that memory on chip is
terribly expensive for everyone and that other chip designers add very
expensive memory when then add it to a processor.  (ie, more than half
of the silicon on that $3000 micro is on chip memory.)

P21 has the equivalent of ten cells of memory on chip and they take
up about 75% of the area that Chuck has layed out.  This is a very
long ways away from integrating large amounts of memory on chip.

Different people design processors and memories and they use different
fabrication technologies.  One could easily spend a semester just
presenting the detail needed to answer this question.  Explaining
the differences between the many fabrication processes is just too
big of a question.

>Are there too few layers to lay out the memory
>cells effectively?

Without a lot of explanation this is a pretty meaningless question.
Memories can be made with any number of layers and in any process.
Of course in order to make the best memories and processors these
are not the same processes.  Modern memories are made with more
layers to provide "vertical transistor layers" in DRAMs that
I have not seen used in processor design. 

What is too few or too many?  It depends on the process you are
using and what you want to design.  Chuck is working with an
environment with 2 layers of metal.  He is not using 3 layers of
metal as are most processor designers, he also not using multiple
layers of transistors as in DRAM designs.

Can he lay out memory?  Sure, but in .8 micron, 2 metal layer, etc,
he cannot lay out memories that will be comperable to what people
are doing with commercial memories.  Could Chuck do it?  If he has
access to the process and the information then of course he can.
But where does it fit on his list of priorities?

Again one might need a semester to frame the answer to such a question.
And it is a soft question anyway.  What does "fully integrated" mean?
There is ROM on F21c.  It is "fully integrated" by my defintion because
it is on the chip.  It is not ideally integrated for a number of
reasons.  It is not in the best place, and it is enough for several
routines and code tables.  Perhaps "fully integrated" means something
else to someone else.  Perhaps it means having enough ROM and RAM on
chip to need none off chip to some people.  But how much is needed?
Chuck only needs a few K for code and a few M for data, but I am
sure someone else will say that fully integrated means porting their
64M system onto the chip.

My idea was not to try to get Chuck to explain the technical details
of VLSI design, sub-micron, quantum-design, process variations 
available etc.  

The idea of this interview is Forth.  It is clear to me that Chuck's
idea of Forth is very different than the ideas that most Forth user's
have about Forth.

My idea is to get Chuck to explain something about Forth to the
Forth community, not to train everyone to become chip designers.

We can't really expect Chuck to answer thousands of detailed questions
about VLSI CAD.  To begin with we would need to begin by asking
thousands of basic questions about semiconductor physics and 
chip architecture etc etc.

In addition to very technical questions about CAD you ask about
parallel processing design, quantum research, questions about other
comanies and where they are going, voice recognition, alternate
keyboards, Java, C++, Visual Basic, program editors, web browsers,
integrated development environments, what Chuck would do if he
were not making chips etc.  He would spend all day answering just
a couple of those questions.  Most of these topics have been 
discussed in this group and I think we know Chuck's opinions on
most of this stuff.  It is just not appropriate to ask him to
explain everything about VLSI CAD to all of us.

Perhaps I should rephrase my orignial suggestion.  I am not looking
for hundreds of lists of dozens of questions. 
 
If people think they have _A_ good question that will help Chuck
explain what is different between his view of Forth and the common
view of Forth please submit it.  I will see if there are any questions
that Chuck might prefer to answer to the one's I will offer.  It
will be his choice.  I will not ask him to review a list of thousands
of questions.
Jeff Fox              jfox@dnai.com    
Ultra Technology Inc. http://www.dnai.com/~jfox/