Re: Building it... & MISC

[KC5TJA <kc5tja@xxxxxxxxxxxxxxxxxxxxxx>]

On 17 Nov 1997, Dan C. Rinnert wrote:

> My last question brought to mind a new question, how are y'all housing your
> homebuilt projects?  Are they simply on exposed PCBs, or have you
> built/bought cases to put them in?  Other than building the processors for
> the fun of it, are you putting them to use in any way?  What peripherals do
> you have?  Hard drive, keyboard, LCD or monitor, floppy drive, etc.?  Did you
> buy those, or fabricate your own?

My first two processors were a 4-bit and 8-bit unit respectively.  The
former could address 256 nybbles of memory, and the latter could address
4096 bytes.  The 4 bit unit WAS upward compatible with the eight bit unit,
if you had an 'expanding' loader (that is, a loader that unpacked nybbles
into separate bytes).

The four-bit processor had the following instruction set:

0	NOP
1	LDA	$nn	; Load A from memory location $nn
2	STA	$nn	; Store A to memory location $nn
3	JAZ	$nn	; Jump if A is zero
4	INC		; Increment A
5	DEC		; Decrement A
6	DSP		; Display A on the CPU's internal LEDs
7	CLR		; Clear the CPU's internal LEDs
8-F	---		; unused.

The eight-bit CPU had exactly the same instruction set, with the following
additions:

Bit 7 of each opcode was unused, and always set to zero.
Bit 6-4 of each opcode specified WHICH accumulator to use.  Capable of
addressing up to eight 8-bit accumulators, I only implemented four, as
that's all the hardware I had at the time.
Bits 3-0 of each opcode are as above.

Addresses for jumps were expanded to two bytes, with the intention of
addressing 64K of memory; however, hardware and cost limitations limitted
me to only 12 bits of address space.

As you can tell by the above descriptions, the hardware for the execution
unit and bus arbiters weren't all that complicated.  For this reason, I
didn't package my CPU at all -- it simply sat out in the open, a massive
entanglement of wires and Radio Shack expandable breadboards, all
ultimately connected to a single 12V power supply, with a 5V voltage
regulator on it... :)

My plans for my 16-bit stack architecture CPU, however, is a radical
departure from the previous CPUs I've built.  About the only thing that's
common between architectures is the bus arbiter.  The 4/8-bit units were
designed soley to see if I could do it, and if so, see if I could write
anything useful with them.  The 16-bit architecture, however, I want to
actually USE.  My first set of applications will likely be a port of my
Dolphin operating system (as a proof of portability), and thereafter, I
want to experiment with the applications of wavelet analysis to RF
signals.

My plans for the 16-bit unit include: 64K address space per process, 16MB
of virtual address space, and 256K of physical address space.  Page tables
will be placed in registers, maintained by software, not hardware.  This
will also be the first CPU I've built that will handle interrupts.  16-bit
instruction set, 16-bit cell width, 8-bit character width.  Memory-mapped
I/O space.  User and Supervisor modes to help support multitasking and
protection. All stacks placed in RAM to help with context switch delays.

=============================================================================
"Tongue Tied and Twisted, Just an Earthbound Misfit..." - Pink Floyd

Long live the AMIGA!!                 HAM Radio: KC5TJA/6, Tech +, 146.730MHz
http://www3.axisinternet.com/~kc5tja                         Grid Square DM13

Project Leader: Dolphin Operating System (mailing list: ddg@axisinternet.com)

PGP block temporarily unavailable...  Another is coming soon.