Re: Re: MISC personal computers -Reply
At 15:27 19990228 -0800, Samuel A. Falvo II wrote:
>> There is also a fatalist attitude among the design staff and I haven't
>> seen any beautiful processors from Motorola since the 6811.
>
>The entire 8-bit line of 68xx series is abhorent in my opinion. I hate them
>with a passion. The 6502 is my favorite 8-bit CPU of all time.
I think the 6811 (etc.) are quite nice in that the pointers are all
16 bits as the 6502 misserably lacks. It's quite easy to write a
good and efficiently coding C-compiler for the 6811. In the 6502
based Apple II people used to add a Z80 card to enable compiled
programs. Not that the Z80 is as easy to write a good compiler for
as for the 6811, but the Z80 was very cheap and the 6811/6809
didn't exist yet, I think...
>> I think the 68000 and PowerPC are very ugly. The 6812 was
>
>Ugly in what way? Technically speaking the 68000 was an absolute marvel of
>engineering when it was first introduced.
Since it has a very unorthogonal instruction and addressing
modes set it's very complex to write a good simple compiler for.
It's main advantage over the 8086 was that it was really 16/32 bits,
but the instruction and addressing modes set was almost more
unorthogonal than that of the 8086. Two sets of different registers
(data and address) greatly enhanced the chaos.
>The PowerPC series of chips is
>also rather impressive in terms of performance and capabilities.
Performance wise perhaps it is, but the instruction coding, instruction
set itself are very chaotic. There are way to many instructions and
only part of the instructions of the original IBM RS6000 POWER
were implemented in the microcomputers and different sets in
different processors.
IBM used to design things by having all their personel (designers,
managers, floor sweapers, cantine ladies) into one big hall, let them
all shout out what they'd like to see in the chip and then implement
ALL the suggestions!
I used to write a disassembler for each new processor architecture
to get a feel for it's instruction set complexity. I also wrote (tried to
write) compilers for some of them.
>> aimed at assembler programmers, so outdated at birth. Their
>> own RISC processor, the 88000, was withdrawn quite quickly
>> after release. The other designers don't seem to have read H&P...
>
>Really? Apple was seriously considering using the 88000 series for their
>RISC-based Macintoshes before PowerPC was announced.
I never understood why they didn't choose the 88000 series and why
Motorola pulled it's RISC processor from the market.
>> The 68020 was revived by the marketing department as 'variable
>> instruction size RISC' under the name Coldfire. It was strangely
>
>The 68000 series has ALWAYS been rather RISC-like as far as the instruction
>set is concerned.
I strongly disagree.
RISC is:
- 32 Bits bus, every instruction is therefore 32 bits.
- Simple small fully (!) orthogonal instruction set.
- Every arithmetic handling is done between registers and there are only a few
(basically two) instructions that can do a load or store to/from memory and only
these instructions can have very simple addressing modes. (Compilers prefer
to do more difficult addressing schemes using normal arithmetic instructions
so in registers).
- There are enough registers (usually 32) so often needed values can be kept
in a register during a functions execution life.
- There is no automatic push and pull during a CALL and RTS/RET,
but the old PC is moved to another register which is pushed and
pulled together with the dataregisters that need to be saved anyway.
Sorry, but I see none of this in the 68000...
If only CPU designers would have listened to compiler writers so now
and then the CPU's could have been so much more beautiful! Or
actually beautiful, most stink anyway. The only ones approaching
beauty were (in historical order) the NS32008/32016/32032, 6811,
ARM, Hobbit, Alpha.
(Sorry, I don't have experience with all architectures, so the Sparc, MIPS
and MISC for example might also be candidates for the list. I have only
added the 6811 and ARM hesitantly...)
>And Coldfire IS architecturally a subset of the 68020
>architecture -- namely, they got rid of all the 'complexities' of the 68020,
>like doubly-indirect addressing modes and such.
It's still not RISC and stays a messy instruction set.
And when new compilers need to be written (or severily adjusted)
anyway, why not design a new real RISC instruction set or buy a
licence for the ARM for example? Why not use the 88000?
>> Problem is that pin-count and surface size determine real mass market
>> costs. And that battery life-time is very important.
>
>Screw that...the REAL reason FPGAs will never be "as cheap" as that $1 Z8 is
>that, while the FPGAs themselves are somewhat inexpensive, the
>//programmers// for those chips still weigh in at thousands of dollars!
>
>You can, however, get an assembler for the Z8 for LInux for free. Big
>difference.
And when the FPGA programming software would also become
cheap and easy to use? The FPGA manufacturers would get their
money from chip sales and not from selling programming tools.
>> Seems like the default is 'answer to the poster' and not 'to the list'.
>> It requires special attention in most email readers to get the thing right.
>> Can't this be changed mailing list manager?
>
>I agree. If I weren't so lazy, I'd have changed the reply address to the
>list, and not to you. *grin*
I'll do it for you... ;-)
Groeten/Greetings,
Jaap
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