Re: Funding

["Lloyd R. Prentice" <pai@xxxxxxxx>]

Eugene Leitl wrote:
> 
> 
> I'm willing to contribute a technical article or two arguing for MISC from
> basic physical principles, specifically explaining why there is no way
> around wafer scale integration (WSI) on the long run, and while there
> is no way around MISC and threaded code if we accept that WSI is
> inevitable, and blahblah.

Hi, Eugene,

It will be a couple of months before I can really sink my teeth into the
MISC newsletter project. But, in the meantime, it would be a good idea
to start building up some content.

Why don't you write the piece and send it to me. It will help me answer
many important questions:

1) How should we define the scope of editorial coverage?
2) How should we define the balance of editorial coverage?
3) How much editorial effort will typical submissions require?
4) Should submissions be refereed?
5) How should we deal with graphics?

One thing that I think would be quite useful would be to start with a
series of articles that establish the history, basic ideas, and
potential of MISC -- sort of "Why MISC?." Sounds like your piece could
be a key part of this.

Thanks,

Lloyd R. Prentice

> 
> Caveat: I have no chip design credentials, though some of the key
> elements of VLIW (long-time readers will probably remember) paper
> design I did a few years ago have cropped up since in mainstream
> architectures, and Chuck seemed to like some of my ideas I proposed
> to him in personal communications. If some of you guys could do a
> lectorate or know anybody who could I guess we could keep the most
> glaring technical inaccuracies from slipping thorough into the final
> publication.
> 
> I cannot pledge a lasting conet contribution, both because of what I
> have to say is limited, and because of imminent workload spike which
> will last for the next few years.
> 
> Regards,
> Eugene Leitl