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MISC reflections


I have recently had the pleasure of familiarizing myself with TI's
MSP430.  Despite many CISC-like features (e.g. operands in memory),
it's ISA consists of merely 27 opcodes...  I have to wonder if any
members of it's design team are lurkers on the MISC list!   :-)

From Turing to today, I have enjoyed the many arguments and proposals
wrt this fascinating subject;  from the most abstruse acedemic
exercises, to debating the relative merits of real silicon.

Three key points have emerged in my mind over the years:

1) - the only figures-of-merit available for assessing 'efficiency'
are:  code size, operation rate, and gate-count / power consumption.

2) - computational scope:  a 1-bit machine is not an 8-bit machine,
is not a 64-bit machine...  and never will be!  Assessments must be
based on "apples-to-apples" comparisions.

3) - A viable architecture is based on our personal expectations of
what a computer should be, and personal preferences of what a
computer should do -- in my case, I demand direct support for all the
abstraction mechanisms that allow high-level metacoding -- in short,
a programming environment that makes me feel productive and creative
as a human being.

I want the machine to reflect the workings of *my* mind, not drag
myself down to thinking like a transistor...  I believe that
computers should be fun, and when I am not having fun, I get rid of
them.


Although my target applications typically require real-time signal
processing and visual graphics, the "excess transistors" neccessary
to meet the performance requirements can be implemented as
specialized I/O co-processors, i.e. a MISC CPU core can still run the
show.


I truly enjoy this list, and am happy to have stumbled-over it --
keep it up, folks!


cheers  - vic


XPICTOC BOCKPEC!   - biktop