MISC In VHDL, T-Shirts
- To: misc
- Subject: MISC In VHDL, T-Shirts
- From: Dave Lowry <lowry@xxxxxxxxxxxxxxxxx>
- Date: Mon, 5 Jun 2000 10:41:56 -0500 (CDT)
I have a variation on Ting's P16 in VHDL running in a Xilinx 4010 FPGA.
It did have a video output, but that never worked to my satisfaction.
(Sparkly lines due to incorrect CPU/video arbitration.) The problem is
that FPGAs are not very fast and quite expensive: P16 runs at 8MHz and
the FPGA costs around US$60. Loads of fun to play with, but not really
competitive with regular Forth on a conventional CPU.
As for the T-shirt idea, fab runs cost in the 10s of thousands of Dollars.
Jeff could supply the exact number. Also, I think F21 was done in 0.8u,
which may not even be available from Mosis anymore. I don't know if it's
a big deal for Chuck to convert a design to a smaller process. Anyway,
that's a lot of T-shirts.
-Dave