Re: Op-code parallelism

[Alan Tutt <alant@xxxxxxxxxxx>]

Greg wrote:

"Jeff's explained that it computes every answer at the beginning of each
instruction...so I assume that by the beginning of the 2/ instruction, T
will hold 1FFF00 or similar (i.e., carry has propagated just 8 bits),
but then what is used to compute the potential answers?  It seems to me
if 2/ were just executed that it would throw off the carry propagating.
I could imagine a series of pretty clever hacks to make arithmatic (as
opposed to flow control) instructions not interfere with the propagating
carry.  Is this what happens?"

Though I have only read the material available on the web, I think I can
shed a little light on this issue, having some hardware design
background.  I may be wrong, but if so, someone can correct me.

Each of the 4 op-codes in an instruction word are executed sequentially,
with position 0 first, then position 1, on down the line.  The 4
op-codes co-exist in a single word for memory optimization reasons and
the pack acts as a mini-cache.

The electrical activity within the chip as each op-code executes goes
like this:  Once the previous instruction has been executed, and before
the current op-code is decoded, the ALU allows the data in the stack
locations to flow through each of the ALU circuits simultaneously.  Thus
the add instruction adds the top 2 data items and has a result ready to
be latched, the shift-left instruction takes the top item and has a
result ready to be latched (on different "wires"), and every other
instruction produces a result, each on different "wires", and all ready
to be latched.  Once the op-code is decoded (which is simply a selection
of which result will be latched to the top of the stack), then the
elements used by that opcode are popped off the stack and the result is
pushed onto it.

Carrys are not a problem, as each ALU operation uses a separate data
path.

Hope this helps.  By the way, can we get off the whining (from all
sides), and move on with life.  If things aren't perfect, either accept
them and make do, or move on to something else.  I thought that this
list was for discussing the MISC concepts.  Yes, it would be nice to be
able to search for a topic in the http://pisa.rockefeller.edu:8080/MISC/
archive.  But having it available is better than nothing.  Yes, it would
be great if all documentation were complete and accurate (and on the
web).  Maybe we should just wait until the chip is finished and those
working on it can tie up all the loose ends (like documentation).  As I
see it, if you want to work with a prototype chip, you should be willing
to work with incomplete data.  If you're not willing to do that, look
for a chip that's out of the prototype stage.  And yes, it would be nice
if everyone could understand what we are trying to get across.  But
there comes a time when you just have to say "I can't help you anymore."
and go on with other things.

I was very surprised to find that Intel (or any company) would provide
documentation for their chips for free.  I always expected to pay for
the info.  My though was that no-one would want to do all that work for
free.  But later I understood that the free documentation was a form of
advertising, and that the chip manufacturers would sell very few chips
unless the engineers designing new products could understand the
operating requirements and capabilities of the chip.  Information such
as when memory data needs to be valid is required since every CPU is
different and has different timing.  This is not information that can be
gained from the memory timing.  (I have no idea if this information is
provided in the F21 or P21 manuals or not - I have not seen them.  But
if the information is not there, it needs to be.  I would need to know
what memory chips will work and which ones will not.  Power usage too. 
If I want to design a battery operated system, can I use AA's or do I
need to use lithium-ions.  As a CPU manufacturer, you never know what an
engineer may want to use your chip to do.)  On the other side, if
someone wants to use a chip that is not through the prototyping stage
and believes in the concept, why not contribute to the funding?  If that
is not feasible, why are you involved with system design?  Hobbyists
have historically been relegated to using older technology.  Back to the
NOVIX!



			-Alan Tutt