F21 Network Coprocessor

[Dave Lowry <lowry@xxxxxxxxxxxxxxxxx>]

There's a detail about the network coprocessor that confuses me.
If I understand what Jeff wrote on the UT website, there is a counter
that shifts bits in whenever it reaches zero.  The counter is reset
to its start value when it reaches zero and when there's a transition
on the input.  What confuses me is it seems that sometimes you'd
want the counter to count down from one full bit time, and sometimes
count down from one half bit time.  After a transition, you'd want to
sample the input 1/2 bit time later, then at 1 bit time intervals
from then on, until the next transition.

--------!________!________!________!--------!________
            ^        ^        ^        ^        ^
        R   r        r        r    R   r    R   r

^ = sample bit
R = counter reset from transition
r = counter reset from reaching zero

Could someone educate me?  Thanks.

-Dave