Re: Just what makes a Forth cpu?

["M. Simon" <msimon@xxxxxxx>]

At 08:37 11/3/00 +0000, Ben Franchuk wrote:
>I am working on a general purpose TTL cpu design, with 
>Indexed(direct),stack and
>register addressing modes.At a cost of 2 more OR gates have added the Forth
>style
>Call to my instruction set: (--R4)= R7,R7 += #.  R4 is the forth return stack.
>R5 is the data stack. R7 is the program counter. All other simple Forth
>instructions
>can be macros 1 to 4 instructions long or Forth Subroutines.
>
>Take 0branch for example as a macro:
>  MOV R1,R0
>  MOV R0,R5++
>  OR R1,R1
>  JMPZ  DEST;
>As forth subroutine:
>  MOV R1,R4++ GET RETURN ADDRESS
>  OR R0,R0 ;
>  JMPZ NOSKIP
>  MOV R0,R5++ GET TOS
>  LEA R7,[R1+2]   SKIP OFFSET AND RETURN
>NOSKIP
>   MOV R0,R5++ GET TOS
>   ADD R1,R1++ ADD OFFSET TO RETURN ADDRESS
>   LEA R7,[R1]
>
>While this not a Forth CPU by a long shot, just what features
>are needed to make a Forth Cpu? Stack operations and the Forth
>style subroutine call helps but does it place my cpu in the Forth
>ballpark or not?
>Ben.

Dual stack architecture.


>--
>"We do not inherit our time on this planet from our parents...
>  We borrow it from our children."
>"Luna family of Octal Computers" http://www.jetnet.ab.ca/users/bfranchuk