[NOSC] Steamer16 survives contact with the real world

[Rick Hohensee <humbubba@xxxxxxxxxxxxxxxx>]

> 
> This originally was bounced when the MISC list went "poof":
> 
> Dear MISCers,
> 
> The sport of CPLD and FPGA design using low-cost tools seems to me to be the
> 21st century equivalent of the early days of microprocessor hacking before
> the monopolies forsook the needs of experimenters and stampeded towards the
> big bu$ine$$ orientation that I have bemoaned ad nauseum in some of my
> previous postings. I encourage those of you who are pursuing your own CPU
> designs to see them through and publish news of the results via the MISC
> list or email direct to me.
> 
> Myron Plichota
> ------------------------

Congratulations. 
For those that don't read comp.lang.forth, H3sm, Hohensee's 3-stack
machine, now exists entirely as x86 assembly, and seems pretty snappy. The
80 or so primitives require about 3k of assembly. Your machine looks like
it would require about, oh, 200 bytes, for a 32 bit subroutine-threaded 
VM, if I am in the ballpark as to what it involves.

Questions about Steamer16

	It's a one-stack MISC with 3 parameter stack cells?
	how many gates/transistors on the device in question?
	how much room is left?
	how long did it take to write the VHDL?
	you're using real good old SRAM with it?
	what are it's bus widths?
	etc etc

MORE INFO!   :o)

Rick Hohensee
www.clienux.com

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