Re: Unidentified subject!

[rdr@xxxxxxxxxxxxx (Raul Miller)]

Robert Hoeller:
       Jeff> In normal operation the serial/network coprocessor will be
       Jeff> reading and echoing serial data, but it will not be making
       Jeff> any memory access.  

   This is not exactly true. You are right, most of the serial port chips
   don't do any memory access. But nearly all network controller do some
   kind of memory access and most of them are able to do it via DMA!
   (see LANCE and friends)

You must have missed the earlier F21 specs -- we're discussing the
network coprocessor built into the F21.

   You describe the network processor in some detail from the software
   point of view. But there is no information about the networking
   from the hardware-architectural point of view:

	   o	what kind of general concept (CSMA/CD <-> token ring <-> ???)

It looked to me like a sort of token ring.  You'd need extra hardware
to implement CSMA/CD.  You could probably implement half-duplex async
serial if you prefer to think along those lines.

	   o	what kind of collision detect / arbitration

this would be implemented in software

	   o	what kind of transmission medium

this wouldn't be part of the chip

	   o	what max. line length (derived from the points above)

this would be implementation dependent.

Think of this "network interface" as a sort of local bus, not as an
IEEE 8...whatever standard and I think you'll be closer to the mark.

-- 
Raul D. Miller