Not frying the P21

[Andrew Sieber <asieber@xxxxxxxxxxx>]

> Andew asked:
>     >Am I reading the schematic wrong, or is it
>     >backwards?  I'd like to know before I build a system, else I
>     >might destroy my MuP21 when it and the '245 fight for control
>     >of the bus.

>     I don't recall exactly how his circuit worked, but I think
>     he cheated on the output latch.  The part wanted a positive
>     going pulse while P21 provided a negative pulse but it
>     sort of worked by latching the wrong side of the pulse 
>     anyway so Dr. Ting used the part.
I don't understand; if you look at the state of the system in the
middle of a write operation, the WE line is low and both the MuP21
and 74245 are trying to drive the data bus.  I don't see how that
can work.
I guess my question is, can I just construct a system exactly as the
schematic on page 92 shows with NO modifications and have a working
system?  Once I accomplish that, I can test most of my questions myself
instead of dumping them all on this mailing list.

>     I used different parts when I designed a substitute arrangement
>     for the orignal parallel i/o chip on the original development
>     system.  I know I showed the circuit diagram that I used one
>     time here in MISC.  It made more sense to me than Dr. Ting's.
Is the '245 used for input and output, or merely for input?  If it's
just input, it seems it'd make more sense to simply use a tri-state
buffer instead of the '245 and have the WE pin ANDed with the output
of the '138 to drive the buffer's Output Enable pin.  No need for a
latching, bidirectional buffer when all you need is a nonlatching,
unidirectional buffer.

>     Don't worry about frying P21 it is very tough.  I have 
>     wired up the 5V backwards and heated the chips up to well
>     past 100C and haven't fried a P21 yet.  I have even tried.
That IS one tough chip!  I'll bet Sony doesn't believe that either. :-)

--Andrew Sieber
asieber@hotmail.com