nForth

["Myron Plichota" <mplichot@xxxxxxxxx>]

Stas can't seem to make up his mind.

I'm not trying to pecker match the x21 design, I'm just trying to fit
something with reasonable performance onto an FPGA. I am leaning towards
Altera Flex10K because of the on-chip RAM (i.e. both stacks) and 32-bit
adders and counters architechtural features. I wonder how essential unsigned
compares are in the 32-bit world. Java has no unsigned integer types for
instance. MIPS RISCs manage without a carry flag. I don't claim to have this
*all* figured out in advance, and I will no doubt learn a thing or two
beyond my present level of experience. I have been influenced by what has
gone on before and wish to experiment a bit. After 20 years I think that is
what Forth is all about. BTW, I'm not claiming any originality. The 15
working instructions were simply reduced from the FORTH79 required word set,
in a 32-bit context.

Given the amazing efficiency of code achieved by modern optimizing C
compilers, Forth isn't all that competitive any more except for either 1)
tiny memory footprint embedded virtual machine systems or 2) an actual Forth
chip. I have done the tiny virtual machine thing many times and now  want to
run a *reliable* Forth chip wider than 16 bits, and the way things are
shaping up, it seems that I have to build, rather than buy silicon to do it
with. My end goal is a lab computer with a lot of room to grow.

Myron Plichota

-----Original Message-----
From: Stas Pereverzev <stas@itvc.com>
To: MISC@pisa.rockefeller.edu <MISC@pisa.rockefeller.edu>
Date: Saturday, February 20, 1999 2:04 AM
Subject: Re: nFORTH v2.3


>
>
>>Comments, folks?
>
>
>You need only five instructions, not 16. They are:
>
>ALU:
>1. nand
>2. shr
>
>RAM:
>3. store ( addr n -- )
>4. lit   ( -- n )
>
>CONTROL:
>5. ncret  \ JUMP to addr in N, if carry flag isn't set in T,
>          \ also drop both T and N
>
>
>Also, if PC is memory variable (or can be addressed as memory variable)
>we can awoid "ncret" instruction:
>In that case we sholud use NCSTORE instead STORE:
>ncstore (addr n flag -- )
>
>ncstore (addr n 0 ) - same as store,
>ncstore (PC n -1 )  - same as ncret
>
>We need only 2 bits per instruction in that case.
>
>That all folks ;-)
>
>Stas.
>

-----Original Message-----
From: Stas Pereverzev <stas@itvc.com>
To: MISC@pisa.rockefeller.edu <MISC@pisa.rockefeller.edu>
Date: Thursday, March 18, 1999 10:40 AM
Subject: Re: support, T-shirts, etc. (composite reply)


>>nanoFORTH is a core set of 15 stack instructions. The 16th instruction
>needs
>>to be nop for instruction alignment in a packed instruction
implementation.
>>I am planning a 32-bit design which fetches an octet of 4-bit
instructions.
>>The attachment summarizes a few of the details.
>
>
>Have you tried to write any simple program with your command set?
>I think that it is impossible.
>How are you going to realize next words with your 15 commands?
>>  <  >=  <=
>
>
>Stas.
>
>