Re: nForth

[msimon@xxxxxxxxxx (M. Simon)]

The Xilinx tools have excellent on chip RAM for dual stacks.
One of the reasons I chose it.

The built in carry chains are also good for fast counters and adders.
Precluding the need for look ahead carry chain up to 32 bits.

Machine FORTH is competitive with compiled C.

You could do a two memory cycle 32 bitter on the XC4005 according to 
others who have done register based machines on this chip.

Simon

>
>Stas can't seem to make up his mind.
>
>I'm not trying to pecker match the x21 design, I'm just trying to fit
>something with reasonable performance onto an FPGA. I am leaning towards
>Altera Flex10K because of the on-chip RAM (i.e. both stacks) and 32-bit
>adders and counters architechtural features. I wonder how essential unsigned
>compares are in the 32-bit world. Java has no unsigned integer types for
>instance. MIPS RISCs manage without a carry flag. I don't claim to have this
>*all* figured out in advance, and I will no doubt learn a thing or two
>beyond my present level of experience. I have been influenced by what has
>gone on before and wish to experiment a bit. After 20 years I think that is
>what Forth is all about. BTW, I'm not claiming any originality. The 15
>working instructions were simply reduced from the FORTH79 required word set,
>in a 32-bit context.
>
>Given the amazing efficiency of code achieved by modern optimizing C
>compilers, Forth isn't all that competitive any more except for either 1)
>tiny memory footprint embedded virtual machine systems or 2) an actual Forth
>chip. I have done the tiny virtual machine thing many times and now  want to
>run a *reliable* Forth chip wider than 16 bits, and the way things are
>shaping up, it seems that I have to build, rather than buy silicon to do it
>with. My end goal is a lab computer with a lot of room to grow.
>
>Myron Plichota
>
Simon - http://www.tefbbs.com/spacetime/index.htm