Re: MISC-ShBoom-MuP21-F21
Hi,
First of all I would like to thank you all for the useful answers you
gave on my questions last time. They are greatly appreciated and are
of a great value to me. But there are yet some things that confuse me,
so...
In the meantime, I had the chance to overlook the design of the PSC1000.
At first I was amazed that there could be a link between a processor
with an instruction set with over 100 instructions and the minimal ones.
But taking a closer look at for example the stacks, I recognized the
resemblance. It's a nice design anyway and it would be great if it
could compete with the big ones.
The PSC1000 is promoted as a Java-processor (though not in the way like
the picoJava's), though it has it roots in Forth. But I think that the
virtual machines defined by both Java and Forth are very much alike.
But, just to make sure, could somebody point me out where I could find
a full, comprehensive summary of the Forth Virtual Machine, and while
I'm at it, of the Forth language in itself. I've already searched the net
for the Forth-language and have found much information, but most of it was
not that adequate.
Forth itself is a a fairly low-level language that can build up with the
help of macro's for higher usage. Right? But, what's the advantage of it
above other languages like C or Java? I can guess wath you're answers will
be, but I would like to hear them though.
What do you think about the OISC/SISC/Ultimate RISC projects, where they
try to have the absolute minimal instruction set. It is known that one single
(complex) instruction can compute everything, but there are also many
disadvantages to do it this way. But it is kind of weird to notice that you
are all talking about Minimal and still have about between 16 and 32
instructions. I know that those SingleISC actually have more instructions,
but there are for example also IS with 4 instructions (LOAD, STORE, INC, BRZ).
Doesn't the usage of the stacks in the MISC-processors restrain the
integration of pipelines and superscalar execution? I know that it it
absorbs a lot of space on a chip to implement this, but they could add
extra speed to the design. Maybe I'm just going to the direction you all
came from, namely the one where there's too much complicated execution-
control, but there are a lot of disadvantages coupled to the stackform
(also many advantages).
I've also found some info's somewhere about the MISC M17, but I haven't
found anything about it at the UltraTechnology pages. I don't know if
anyone's familiar with this design? From wath I know, it resembles much at
the MuP21, but that's just based on the little I know about it. I'm not
even sure it's designed by Chuck Moore.
Thanks in advance.
Greetings, Tom.
